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Category:Compression software
Category:Freeware1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device, and more particularly to a method of fabricating a semiconductor device having an insulation layer containing a metal oxide.
2. Description of the Prior Art
The miniaturization of semiconductor devices is the essence of their superior performance, but there are limits to the miniaturization of such devices. The reason for this is that the operation of such devices is based on the reduction of charges between the gate and the substrate of a field effect transistor (FET). This is achieved by applying a bias voltage to the gate, thereby providing a bias field for attracting the carriers from the gate to the channel. As the gate is miniaturized, however, the field strength of the bias field decreases. This results in deterioration of the gate controllability of the carriers, and the carriers cannot be controlled properly. Therefore, the miniaturization of semiconductor devices inevitably results in the deterioration of their performances.
To avoid the above problem, it has been proposed to incorporate, in the gate insulation layer, a substance having a higher dielectric constant than that of silicon oxide. For example, one of such substances is tantalum oxide. The application of such substances to the gate insulation layer is called the “high-k technique”, and the gate insulation layer incorporating the high-k substances therein is called the “high-k gate insulation layer”. The “high-k gate insulation layer” is characterized in that it has a high resistance against the tunneling current between the gate and the substrate. The “high-k gate insulation layer” will be characterized hereinafter, and the related literature will be discussed later.
In recent years, a lot of progress has been made on the development of techniques for realizing a thin film transistor having a high-k gate insulation layer. U.S. Pat. No. 6,380,774 and U.S. Pat. No. 6,351,104 have disclosed a technique for forming a high-k gate insulation ac619d1d87
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